My previous blog explained the computing architecture requirements for AI workloads. Now, I take a deep dive into the types of materials engineering breakthroughs needed to enable these new architectures.
This two-part blog series examines the changes needed to computing architectures in the AI era and the role materials engineering will play to make it happen.
The first material change in the transistor contact and interconnect in 20 years is required to remove a major performance bottleneck between transistors and the outside world.
The final installment of my blog series discusses the need for “integrated materials systems” and why the days of working with individual materials from the periodic table are over.
Part 2 of my blog series looks at how new materials, materials engineering and 3D design techniques are extending the semiconductor technology roadmap even as classic 2D scaling reaches physical and economic limits.
CMP continues to be a key technology for materials-enabled scaling for the latest 3D inflections in NAND and logic, and will be critical to managing edge placement error.
5G networks supporting the explosion of big data combined with artificial intelligence (AI) will create a renaissance of computing and storage hardware.
