At the upcoming IEEE International Electron Devices Meeting (IEDM) next month in San Francisco, Applied Materials will discuss recent R&D achievements for manufacturing 3D transistors and new memory technologies. The papers presented together with imec, Qualcomm Technologies and National Taiwan University maintain the forum’s tradition of highlighting breakthroughs in semiconductor technology to drive future device generations.
Reporting on an industry-first for FinFETs, Applied and imec describe how using an innovative high-temperature ion implantation technology in a metal gate process flow improves electrical performance. In another study aimed at boosting transistor speed, Applied and the National Taiwan University report on a breakthrough demonstration using novel germanium tin (GeSn) material in the p-channel that resulted in a record-high 7 percent enhancement in mobility.
Exploring new memory technologies, an Applied-Qualcomm team validated the sub-10nm CMOS scalability of a Spin-Transfer Torque magnetic RAM (STT-MRAM) device for high-performance applications. This emerging technology is well suited to replace SRAM, DRAM and NOR flash as a storage technology for mainstream applications due to its low latency, high speed, scalability and unlimited endurance. By leveraging existing CMOS processes, high-volume manufacturing of SST-MRAM can be implemented seamlessly and at lower cost than other new technologies.
Applied is also hosting its annual Panel Discussion during the conference on the evening of Tuesday, December 6 at 5:00 PM at the Parc 55 San Francisco Hotel. With the theme, Rethinking Scaling: New Paradigms, New Approaches, the event will feature distinguished panelists from IBM, Qualcomm, SK hynix and TSMC. They will explore the effects that applications-driven system-level integration will have on device design, geometric and performance scaling, the relative rank of software vs. hardware design, and requirements for on-wafer processes. IEDM attendees will want to attend this panel to gain insight into the innovations enabling the next revolution in technology.
Chidi Chidambaram, Qualcomm
Rama Divakaruni, IBM
Jung Hoon Lee, SK hynix
Prabu Raja, Applied Materials
Douglas Yu, TSMC
Raman Achutharaman, Applied Materials
Improvement of the CMOS Characteristics of Bulk Si FinFETs by High Temperature Ion Implantation
Y. Kikuchi, T. Hopf, G. Mannaert, Z. Tao, A. Waite*, J. Cournoyer*, J. Borniquel*, R. Schreutelkamp*, R. Ritzenthaler, M.-S. Kim, S. Kubicek, S. A. Chew, K. Devriendt, T. Schram, S. Demuynck, N. Variam*, N. Horiguchi and D. Mocuta, imec, *Applied Materials
Tuesday, Dec. 6, 4:00 PM
Systematic Validation of 2x nm Diameter Perpendicular MTJ Arrays and MgO Barrier for Sub-10 nm Embedded STT-MRAM with Practically Unlimited Endurance
J. Kan, C. Park, C. Ching*, J. Ahn*, L. Xue*, R. Wang*, A. Kontos*, S. Liang*, M. Bangar*, H. Chen*, S. Hassan*, S. Kim, M. Pakala* and S. Kang, Qualcomm Technologies, Inc., *Applied Materials
Wednesday, Dec. 7, 10:20 AM
Record High Mobility (428cm2 /V-s) of CVD-grown Ge/Strained Ge0.91Sn0.09 /Ge Quantum Well p-MOSFETs
Y.-S. Huang, C.-H. Huang, F.-L. Lu, C.-Y. Lin, H.-Y. Ye, I-H. Wong, S.-R. Jan, H.-S. Lan, C. W. Liu, Y.-C. Huang*, H. Chung*, C.-P. Chang*, S. Chu* and S. Kuppurao*, National Taiwan University, *Applied Materials
Wednesday, Dec. 7, 1:35 PM