Selective processing is increasingly being used to create, shape and modify materials and features in semiconductor manufacturing. In this blog I explain what selective processing is and why it’s critically important to the future of chip scaling.
Applied’s newest Integrated Materials Solution solves the challenge of selective tungsten deposition, enabling simultaneous improvements in chip power, performance and area/cost (PPAC) in the most advanced foundry-logic nodes.
With EUV-enabled advances in 2D scaling pushing the limits of conventional materials engineering techniques, a breakthrough is needed to overcome increases in contact resistance and enable continued improvements in chip performance, power and area/cost (PPAC).
Applied Materials moderated a thought-provoking panel discussion during IEDM which showed that while there is no single path to achieving continued improvements in chip performance, power and area-cost, the industry will be well-served to search for solutions together.
What’s clear from the panel discussion I recently moderated with Facebook, IBM, Intel, Stanford and TSMC is that the semiconductor design and manufacturing model is evolving and will look extremely different in the years ahead.
The AI Era is fueling an explosion of data, while Moore’s Law is no longer the predictable engine of progress that it once was. With opportunities and challenges of this magnitude, we need to open the strategic planning lens and decide where we want to be in 2029.