heterogeneous integration

Applied Materials recently entered a new phase of our R&D collaboration with A*STAR’s Institute of Microelectronics to accelerate materials, equipment and process technology solutions for hybrid bonding and other emerging, 3D chip integration technologies.

At the Applied Materials Master Class today, we highlight two fast-growing and highly enabling areas of the semiconductor industry. “ICAPS” silicon powers billions of new devices on the edge—including electric vehicles. No longer an afterthought, packaging now enables the benefits associated with Moore’s Law to continue even as 2D scaling slows. Today’s class demonstrates that the AI Era requires innovation across a wide range of technologies, from the edge to the cloud.

Applied’s upcoming, Sept. 8 Master Class features the topic of heterogeneous design and advanced packaging. In this blog I preview why the role of packaging has evolved from simply protecting and connecting chips to circuit boards, to now being a competitive imperative for the world’s leading semiconductor and systems companies.

Amid a slowdown in classic Moore’s Law scaling, heterogeneous design and advanced packaging play a growing role in the logic roadmap.

What’s clear from the panel discussion I recently moderated with Facebook, IBM, Intel, Stanford and TSMC is that the semiconductor design and manufacturing model is evolving and will look extremely different in the years ahead.