etch

To help the industry meet global demand for more affordable, high-performance memory, Applied Materials today introduced solutions that support three levers of DRAM scaling: a new hard mask material for capacitor scaling, a low-k dielectric material for the interconnect wiring, and the adoption of high-k metal gate transistors for advanced DRAM designs.

The AI Era of computing is fueling exponential growth in data generation, and the entire technology ecosystem depends on the semiconductor industry finding new ways to scale DRAM architectures to keep pace with bit demand. New hard mask patterning films can enable thinner capacitors with the highest possible aspect ratios, while new dielectric insulating materials can reduce the spacing between metal lines, both resulting in new ways to shrink.

Selective removal technologies capable of removing materials at the atomic-scale are needed to enable new ways to shrink transistors as 2D scaling reaches physical limits.

Semiconductor industry analyst and CEO of VLSIresearch Inc., G. Dan Hutcheson discusses the radically different Producer® Selectra™ etch system and extreme selectivity's importance for the industry. 

3D NAND is getting closer to becoming a mainstream technology. However, there is still work to be done for it to make its way into the cost-sensitive consumer market.

To prevent electrical current leaking between adjacent transistors, state-of-the-art microchips feature shallow trench isolation (STI) to isolate transistors from each other. Key steps in the STI process involve etching a pattern of trenches in the silicon, depositing dielectric materials to fill the trenches, and removing the excess dielectric using technologies such as chemical-mechanical planarization (CMP). But as the industry scales to sub-20 nanometers significant challenges for the STI etch step are emerging.

Etch.A very short word for a hugely important technology, without which there would be no microchips. Etch is the process by which images of circuit features printed on a silicon wafer are engraved into the films below. Put another way, etch makes circuits real.Last week, I blogged about how our latest innovations in plasma etch technology can help chipmakers construct 3D Flash memory arrays. In fact, etch has been solving cutting-edge problems for more than three decades.

It might be the understatement of the year to say that Flash memory is popular. Every year, we consume nearly twice as many bits as the year before.Consider these nuggets: Today’s smart phones have more Flash memory than a desktop computer’s hard drive from the mid-1990s. Even budget phones can capture high-definition (HD) video and share it on the web. Flash-based solid state drives have moved from exotic to commonplace in just the last couple of years.This has been made possible by a precipitous fall in the cost-per-bit. Every five years, the cost falls by an order of magnitude. How do memory makers cope with this treadmill?

Photomasks, as regular readers of this blog may recall, are the blueprints used for making chips. The photolithography process prints the patterns etched on the mask onto silicon wafers to define transistors, memory cells and wiring – all the nanoscale structures that make up a functional device.Lithography is expected to undergo a seismic shift over the next few years as the industry adopts a new technology called extreme ultraviolet lithography, or EUV for short. This change requires a new generation of photomasks featuring new materials and operating principles.