AI Era

Watch the video replay of Applied Materials CEO Gary Dickerson’s keynote at SEMICON West to hear about new initiatives Applied is driving to enable a more sustainable company, industry and world.

Applied’s newest Integrated Materials Solution solves the challenge of selective tungsten deposition, enabling simultaneous improvements in chip power, performance and area/cost (PPAC) in the most advanced foundry-logic nodes.

With EUV-enabled advances in 2D scaling pushing the limits of conventional materials engineering techniques, a breakthrough is needed to overcome increases in contact resistance and enable continued improvements in chip performance, power and area/cost (PPAC).

The advent of EUV lithography is helping overcome transistor scaling challenges, but new innovations in materials engineering are needed to enable performance and power to scale as well.

Metrology allows process engineers to see the results of process steps. Today, driving improvements in chip performance, power and area/cost (PPAC) requires novel architectures and exotic material stacks. This is introducing new sources of atomic-scale variation that can negatively impact chip performance and yield. It is becoming imperative to “watch” the deposition process as it occurs to control variability and deliver repeatable performance.

During his keynote at the AI Design Forum™, Applied Materials CEO Gary Dickerson showed the audience how AI represents the biggest opportunity and challenge of our lifetime.

Today, Applied Materials is introducing the most sophisticated chip-making systems the company has ever developed to enable high-volume production of MRAM, PCRAM and ReRAM.