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As classic 2D scaling with EUV shrinks on-chip wiring, electrical resistance increases exponentially, creating power, performance and heat challenges. Moreover, as transistor counts continue to increase exponentially while 2D scaling slows, die sizes are increasing to the point where designers are hitting the “reticle limit” of chip designs. Fortunately, innovations in chip wiring will enable chipmakers to continue delivering improvements in performance and power—while advances in chip integration will give designers virtually unlimited transistor budgets. In short, “new ways to wire and integrate chips” will enable amazing computing experiences for everyone.
The industry will continue to use EUV lithography and materials engineering to push logic density scaling to the limit. In recent years, DTCO techniques have supplemented classic 2D scaling, and today, these “newer ways to shrink” contribute about half of the industry’s progress.
Classic 2D Moore’s Law scaling can continue for years into the future—as long as we also solve the materials engineering and metrology challenges that accompany EUV lithography.
Recently I participated in a fascinating panel discussion with experts from Arm, Google, Intel, Microsoft, UC Santa Barbara and VMware to explore how Big Data, AI and cloud computing can be used to help mitigate—rather than contribute to—climate change.
Watch the video replay of Applied Materials CEO Gary Dickerson’s keynote at SEMICON West to hear about new initiatives Applied is driving to enable a more sustainable company, industry and world.
Applied’s newest Integrated Materials Solution solves the challenge of selective tungsten deposition, enabling simultaneous improvements in chip power, performance and area/cost (PPAC) in the most advanced foundry-logic nodes.
With EUV-enabled advances in 2D scaling pushing the limits of conventional materials engineering techniques, a breakthrough is needed to overcome increases in contact resistance and enable continued improvements in chip performance, power and area/cost (PPAC).
The advent of EUV lithography is helping overcome transistor scaling challenges, but new innovations in materials engineering are needed to enable performance and power to scale as well.
Three of Applied Ventures’ investment companies are working tirelessly using materials engineering and imaging capabilities to develop innovations that can help the medical community detect, treat, curtail—and ultimately suppress—this viral pandemic.
This year, Applied Materials employees are going virtual in support of EarthWorks, the company’s annual campaign to inspire education and action around environmental sustainability and ensure a cleaner and greener tomorrow.
