Emerging Technologies
Semiconductors

Introducing Breakthroughs in Materials Engineering for DRAM Scaling

by Sony Varghese
May 05, 2021
To help the industry meet global demand for more affordable, high-performance memory, Applied Materials today introduced solutions that support three levers of DRAM scaling: a new hard mask material for capacitor scaling, a low-k dielectric material for the interconnect wiring, and the adoption of high-k metal gate transistors for advanced DRAM designs.
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Emerging Technologies
Semiconductors

DRAM Scaling Requires New Materials Engineering Solutions

by Sony Varghese
Apr 27, 2021
The AI Era of computing is fueling exponential growth in data generation, and the entire technology ecosystem depends on the semiconductor industry finding new ways to scale DRAM architectures to keep pace with bit demand. New hard mask patterning films can enable thinner capacitors with the highest possible aspect ratios, while new dielectric insulating materials can reduce the spacing between metal lines, both resulting in new ways to shrink.
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Industry Leaders Examine Advancing Interconnect Scaling
Semiconductors

Industry Leaders Examine Advancing Interconnect Scaling

by Applied Materials Blog
May 14, 2015
Applied Materials will host a forum at the IITC* conference in Grenoble, France on May 19 to discuss ways of overcoming critical challenges in copper interconnect scaling. While much of the industry’s focus has been on transistor scaling, at the 10nm node and beyond, the interconnect is becoming a major issue. Applied Materials and guest speakers will explore the path that interconnect technology must take to keep pace with Moore’s Law in a panel titled "Advancing the Frontiers of Interconnect Scaling."
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