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The industry will continue to use EUV lithography and materials engineering to push logic density scaling to the limit. In recent years, DTCO techniques have supplemented classic 2D scaling, and today, these “newer ways to shrink” contribute about half of the industry’s progress.
Classic 2D Moore’s Law scaling can continue for years into the future—as long as we also solve the materials engineering and metrology challenges that accompany EUV lithography.
The Intel EPIC Outstanding Supplier Award recognizes the highest level of achievement in the Intel global supply chain and is an ongoing realization of continuous improvement within the high-performing Intel supplier ecosystem. In 2022, only six suppliers across the Intel supply chain earned an Intel Outstanding Supplier Award, making them truly the best of the best.
Applied has introduced a new method of tungsten gap fill for logic contacts and local interconnects that will help improve the yield of next-generation devices. Learn why it’s so significant.
New materials engineering innovations significantly reduce contact resistance, making it possible to extend tungsten metallization to next-generation devices.
Applied Materials is chairing a panel discussion with memory technology leaders including Intel, Samsung, SK hynix and Western Digital to address new types of storage class memory as part of the eighth IEEE International Memory Workshop on May 16.
