Applied Materials Executive Chairman Mike Splinter was recognized this week at the Semiconductor Industry Association’s (SIA) 36th annual awards dinner, where he received the Robert N. Noyce Award, the industry’s highest honor, for his significant contributions to the U.S. semiconductor industry in technology and public policy.
A well-known and respected industry veteran, Mike successfully led Applied Materials as CEO for more than a decade, expanding the company’s position as a leading global equipment provider to the semiconductor, display and solar industries, and helping to drive critical innovations in transistor design to further Moore’s Law, the foundation of all...
Applied Materials Executive Chairman Mike Splinter was interviewed by Liz Claman earlier this week as part of FOX Business’ “Three Days in the Valley” series. Mike explained how materials innovations are key to enabling the low power, high performance chips used in cutting-edge mobile products such as wearables and smartphones like those launched recently by Samsung and Apple.
Cutting-edge technology advancements in the semiconductor and display equipment manufacturing industries increasingly are being driven by mobility. The rapid growth in smartphones and tablets has propelled manufacturers to explore new advanced materials, manufacturing processes, and transistor technologies in order to keep up with the accelerating pace of innovation.
Mobility applications demand higher resolution and higher performance in LCD, OLED and touch panel displays. Enhanced viewing experiences through OLED and flexible displays, combined with thinner, lighter, greener and more portable form factors, are right around the corner.
On July 8 beginning at 1:00pm PT at our Santa Clara, Calif. headquarters, Applied Materials will discuss these trends and the company’s role in advancing the semiconductor and display industries during our annual Analyst Meeting.
To prevent electrical current leaking between adjacent transistors, state-of-the-art microchips feature shallow trench isolation (STI) to isolate transistors from each other. Key steps in the STI process involve etching a pattern of trenches in the silicon, depositing dielectric materials to fill the trenches, and removing the excess dielectric using technologies such as chemical-mechanical planarization (CMP). But as the industry scales to sub-20 nanometers significant challenges for the STI etch step are emerging.
Mobility is the biggest influence shaping the semiconductor industry and is the main driver of chip development. Smartphone sales are expected to surpass 700 million units growing at a 50% growth rate year over year and demand for tablets is set to exceed 110 million units growing at an 85% rate year over year. The race to manufacture chips for the surging mobile markets is driving the industry to explore new materials and technologies to enable essential breakthroughs for higher, more power-efficient performance. For the PC market, we will see the advent of Ultrabooks and the new Windows 8 operating system – both of which can spur a technology upgrade cycle and drive growth.
Chip makers and equipment suppliers are taking new steps forward in exploring revolutionary materials and techniques needed to continue enabling breakthroughs in microchip performance. The pace of innovation is ramping at a rate never-before experienced in the industry. We’re going to see more changes in the next five years than we’ve seen in last 15. Without these efforts, the innovation engine that has produced generation after generation of mobility and computing devices capable of astonishing capabilities will stall. One area where disruptive change is coming is the interconnect.
Following is a short explanation of this transition.
Transistors are the fundamental building blocks out of which all modern electronic devices are built. Invented in the early 1950s, transistors are the semiconductor switches that control and amplify electronic signals. As demand has grown over the years for greater performance from these devices, chipmakers have responded by packing wafers with twice as many of the transistors that drive that performance every two years – a trend described by the iconic Moore’s Law. Today, an advanced microprocessor may use up to three billion transistors.
Pure silicon isn’t terribly thrilling. It’s neither a perfect insulator nor a perfect conductor. It’s somewhere in the middle.
Inserting a smattering of boron or phosphorus atoms into the silicon crystal lattice really spices things up. This process is called ion implantation and it’s one of the fundamental processes used to make microchips.
Since we launched new ion implantation technology today, in the form of the Applied Varian VIISta® Trident high current system, it seems a good time to take a closer look at the fundamentals of ion implantation.
May 4, 2011 may go down in history as a day that shook the chip industry to its core, literally. Anyone even remotely interested in technology must have caught Intel’s dramatic announcement on that day that 3-D transistors are now ready to enter high-volume manufacturing.
However, other leading players believe there’s plenty of development room left in two dimensions.