Applied Materials is chairing a panel discussion with memory technology leaders including Intel, Samsung, SK hynix and Western Digital to address new types of storage class memory as part of the eighth IEEE International Memory Workshop on May 16.
At the 2014 Flash Memory Summit, I participated in a panel discussion titled, “Is 3D NAND a disruptive technology for Flash storage?” The consensus is that 3D NAND will be the most viable storage technology in the years to come, although opinions were mixed on when that disruption would be evident.
One of the biggest developments taking place in the semiconductor industry is the emergence of 3D NAND memory technology. Products are available today that feature 3D NAND devices. It has taken years to become a reality — since Toshiba first discussed the concept of 3D NAND at the VLSI Symposium in 2007 – and now it is poised to replace planar NAND flash memory for storage.
The path that has led to this point is similar to what happened with the logic roadmap; despite innovative workarounds, the era of traditional planar "shrinks" for NAND is running out of steam. And, just as with logic, it has required significant technical advances to overcome the formidable challenges to successfully manufacture complex vertical 3D NAND designs.
The past several weeks have been big for 3D NAND flash technology.
Samsung announced it had begun mass production of its first 3D vertical NAND flash memory, a 128GB chip using 24 cell layers. Following this news, at the Flash Memory Summit, Samsung Executive Vice President and General Manager E.S. Jung delivered a special keynote address, titled ”Ushering in the 3D Memory Era with Vertical NAND.” In his talk, he told the audience that Samsung’s implementation of 3D NAND was delivering impressive performance benefits over its previous 19nm planar NAND: 2 times higher density, 2 times faster write speed, 50 percent less power consumption and 10 times better endurance.
This week I’ll be participating in a panel discussion at the Flash Memory Summit in Santa Clara, CA. The panel’s topic, Flash Below 20nm: What is Coming and When?, couldn’t be more timely. Particularly in light of a leading NAND manufacturer’s recent announcement that they will begin mass production of the semiconductor industry’s first 3D vertical NAND flash memory later this year.
3D NAND presents some significant changes to the traditional semiconductor manufacturing model.
In the same way that various prophets of doom foretell the imminent demise of Moore’s Law, we often hear that conventional memory technologies are going to run out of steam soon.
However, the semiconductor industry is highly-skilled at extending its existing architectures rather than making the leap to shiny new ones with apparently compelling advantages. Thus, incremental advances in conventional technology have delayed the introduction of a raft of exciting new memory technologies.
When will the tipping point be reached that pushes one or more into the mainstream? Read what the some of the best-informed minds in the business have to say after the jump.
Mobile computing is now everywhere, more than ever before as a result of faster and more capable smart phones, tablets, and laptops.
Universal mobility and instant-on connectivity may herald a new era in computing, but improvements in key technologies are necessary if we are going to keep up with consumers’ constant demand for higher performance, longer battery life and ultra-sleek profiles.
To address these technology improvements and answer key questions that may significantly impact the way we interface with an increasingly connected world, Applied Ventures and the MIT Club of Northern California (MITCNC) will host a lively panel discussion with innovators from across the memory value chain on Wednesday, February 1 at 6:30pm in Santa Clara, Calif.
[edit: you can read a report from the session here.]